In the art of deposition of films of material onto a surface of a substrate, there are many known techniques, including vacuum deposition, ion plating, ion- and plasma-assisted, and the more modern ICB approach. ICB deposition is an ion-assisted technique in which the material to be deposited on a substrate is heated in a crucible and its vapor ejected through a small nozzle into a vacuum region. The vapor forms loosely-held atomic clusters, each cluster comprising 100 to 2000 atoms of the material. Some of the ejected vaporized atomic material is ionized by electron bombardment and the atoms are accelerated toward the substrate disposed in the vacuum region. The ionized material, together with the neutral (i.e., non-ionized) component of the vapor, arrive at the substrate surface for deposition thereon. ICB deposition offers the ability to precisely control the deposited film structure by applying kinetic energy to the vapor clusters during film deposition. Kinetic energy control is achieved by varying the acceleration voltage and the electron current for ionization.
In most of the known ion- and plasma-assisted deposition techniques, the individual atoms of the material to be deposited on the substrate generally impact the substrate surface with excessive kinetic energy, producing a relatively high number of defects in the substrate and/or the deposited film. With ICB deposition, a more useful lateral energy is obtained as the clusters impact the substrate and the atoms break off, without damaging the film and substrate. Due to the effects of ionized cluster bombardment, ICB deposition produces films with high density, strong adhesion, a low impurity level, and a smooth surface. Also, film properties usually associated with relatively high substrate temperatures in conventional vacuum depositions can be obtained at lower substrate temperatures in the ICB technique. This results in a distinct advantage in semiconductor device fabrication. See U.S. Pat. Nos. 4152478, 4217855, 5350607 and 5380683, all of which are hereby incorporated by reference.
The trend in the semiconductor manufacturing industry has always been to increase the number of active devices (e.g., transistors, resistors, capacitors) formed in an area of a semiconductor substrate (e.g., silicon, germanium). This increase in IC density has been achieved primarily by decreasing the size of the active devices and associated electrically-isolating areas formed on or in the IC substrate. Such size reduction has been achieved by improved fabrication methodologies. For example, it is common to employ buried contacts within the IC substrate. Buried contacts represent a method of using polysilicon, which normally comprises the gate terminal of a metal oxide semiconductor ("MOS") transistor, as a local wiring or interconnect scheme between various active devices formed as part of the IC. Basically, an ohmic contact is made to active device areas (e.g., the source and drain terminals of an MOS transistor) formed in the silicon substrate. Conductive interconnecting material is then routed between the ohmic contacts, connecting them together. This entire process is generally referred to as "metallization".
In this process, an electrically-insulating oxide layer is deposited or formed on a surface of a silicon substrate. The oxide layer is patterned and etched to expose the surface of the underlying substrate at desired locations. A layer of polysilicon (which ultimately serves as the metallization) is deposited over the surface of both the oxide and silicon substrate at the exposed openings in the oxide. Polysilicon deposition is typically carried out by a chemical vapor deposition ("CVD") process, in which gases are introduced into the reaction vessel. The gases react with one another, resulting in free silicon deposited on the substrate surface. The openings in the oxide layer define the locations for the buried contacts. The polysilicon film is doped by, e.g., implantation or diffusion, to establish a desired work function. Alternatively, the polysilicon film may be in-situ doped at the time of deposition. The polysilicon film is patterned to create the gate and local interconnect metallization structure.
The problem with this approach to forming the buried contacts is that after the oxide has been removed from the surface of the silicon substrate at the desired locations (in preparation for polysilicon deposition), a small amount of undesirable native oxide re-forms on the surface of the silicon substrate prior to polysilicon deposition. This interfacial oxide represents a source of unwanted resistance (more specifically, impedance) between the active device and the buried contact. Prior art polysilicon deposition techniques do not remove this oxide and resulting impedance, which ultimately degrades IC device performance. It is known in the prior art to utilize annealing to remove the oxide, but this adds unwanted process complexity. See, for example, U.S. Pat. No. 5470794.